Vlsi Implementation of Low-power Adaptive Fir Filter Using Distributed Arithmetic

The main objective is to design DA based adaptive filter in order to decreasing the logic complexity. Throughput is increasedby using parallel Look Up Table (LUT) update and concurrent implementation of filtering and weight-update operations.DA uses bitserial operations andlook-up tables (LUTs) to implement high throughput filters. Two smart LUT updating methods are developed, and least meansquare (LMS) adaptation is performed to update the weights,and minimize the mean square error between the estimated anddesired output. The conventionaladder-based shift accumulation for DA-based inner-product computationis replaced bycarry-save accumulationin order to reduce the sampling period and area complexity. Reduction of power consumption is achieved in the proposeddesign by using a fast bit clock for carry-save accumulation buta much slower clock for all other operations.